The present invention relates to memory controllers using expanded memory space (EMS) to map an address from one location to another.
The EMS translation function is typically done in a support chip for use with a microprocessor in a personal computer. One such semiconductor chip is Part No. 82C631 from Chips and Technologies. In an EMS system, the microprocessor will provide addresses only within a certain range, for instance, 1 megabyte. Within that 1 megabyte range, certain designated address "windows" are provided. When the EMS circuitry sees an address within that window, it provides a translated address from a register in substitution for the window address. Thus, an address window in the 1 megabyte range can point to an EMS address location in, for instance, anywhere from 2 to 16 megabytes.
Another type of support chip used with a microprocessor is a dynamic random access memory (DRAM) controller chip, such as Part No. 82C212 from Chips and Technologies. The DRAM controller receives the addresses from the microprocessor and generates the necessary timing and select signals depending upon how memory is organized. (A memory may be organized into four banks of chips, and the DRAM controller will produce one of four select signals to choose one of the four banks of chips.) The DRAM controller will also have decode circuitry to determine if the address is intended for DRAM. Certain addresses are not intended for DRAM, such as BIOS (basic input/output system) ROM (read-only memory) addresses and video RAM addresses. A separate, video RAM is often used which is dual-ported so it can be accessed directly by the microprocessor or a video controller. Thus, where addresses are intended for these ROM devices or dualported RAM areas, the DRAM controller will not act on the addresses. Because the memory space used for BIOS ROM and video RAM is unavailable for DRAM, some systems will physically remove DRAM chips from those areas. Other systems will physically place DRAM chips in those areas, but provide rerouting circuitry so that a different logical address activates those chips. For the BIOS ROM, "shadow" RAM is often used to provide a duplicate copy of the contents of the BIOS ROM. This is done when a system is powered up to put the BIOS ROM contents in the more quickly accessible DRAM. Since the DRAM requires constant refresh, it cannot be used to permanently store the BIOS ROM contents. This is an expensive duplication of memory which makes sense for the small, often-used BIOS ROM. There has been no practical alternate use of DRAM "behind" the video RAM.
When EMS translation is used in combination with a DRAM controller, the DRAM controller waits to see if there is an EMS translation before examining the addresses. Otherwise, the DRAM would try to access the window address directly. By waiting and looking at the translated address out of the translator, the DRAM controller avoids getting a window address which is not for it. When an address is for a reserved section of memory, the DRAM controller will ignore it. The EMS circuit cannot target reserved sections with translated addresses because the DRAM controller will ignore them since it cannot tell the difference between such a translated address and an address intended for BIOS ROM or video RAM.